1. Field of the Invention
The present invention relates to a method for producing a protective cover for a device, and in particular to the production of a protective cover for devices containing areas whose function would be impeded by injection-molding housings, such as SAW filters (SAW=surface acoustic wave), BAW filters (BAW=bulk acoustic wave), resonators, sensors, e.g. surface-micromechanical sensors, e.g. acceleration sensors, rotation rate sensors and the like, actors and/or devices with surface-micromechanical structures the function of which would be impeded by an injection-molding housing. In particular, the present invention relates to a method for producing such a protective cover for the devices on wafer level.
2. Description of the Related Art
Conventionally, devices are produced on and/or in a substrate, wherein after completion of the device the substrate including the device is arranged in an injection-molding housing in a protected manner. In this arrangement, the substrate and the device are completely embedded in the material of the injection-molding housing at least in the area of the device. This procedure is disadvantageous for devices whose function is impeded by this material, which thus require a clearance for proper operability, as this is for example required in the above-mentioned devices.
A known approach to solve these problems with reference to injection-molding housing is to provide a “counter-substrate” in which a corresponding opening is inserted, so that when assembling the device substrate and the housing substrate the cavity is arranged in the area of the device in the device substrate, so that here no further impeding of the device occurs. On wafer level, a wafer is correspondingly produced with a corresponding structure for the devices (system wafer), which is connected to a second wafer (lid wafer) having corresponding pits and holes having been produced for example by etching it, e.g. by a bond procedure. In this manner, the pits of the second wafer will form cavities above the sensitive structures of the first wafer, the contact pads of the first wafer being accessible through holes in the second wafer. Hereby, the sensitive structures are protected. Alternatively to the procedures just described, ceramic housings are also used.
The disadvantage of this solution is that here always a second substrate or a second wafer is to be structured, which requires processing and machining separate from the first wafer. This leads to very expensive overall production and also increases the requirements with respect to the required process accuracy. A further disadvantage of the procedure is that in the connection of the lid wafer to the system wafer pressure and temperature have additionally to be applied, and that the requirements on the surface quality and purity are correspondingly high. A further, even more serious disadvantage is that during this bond process the micro-electromechanical structures are already exposed so that here an additional yield risk exists.
In the post-published German patent application DE 102 00 869 A, an alternative method is described, which describes a sacrificial layer and a cover element formed by a photoresist. The sacrificial layer is formed over the area of the substrate in which the device is formed, in which the cavity is to be produced later. Over the sacrificial layer, a photoresist layer is deposited in which holes are inserted to expose the sacrificial layer in the area of the holes. Then the sacrificial layer is removed by suitable measures, and the holes in the photoresist layer are closed. The disadvantage of this procedure is to be seen in the structuring of the holes in the resist layer above the sacrificial layer. Due to the great thickness of the resist (lacquer) (>1 μm), the rough and greatly reflecting sacrificial layer, as long as metals are used for this, and the strong dependency of the hole size and hole quality on the lacquer thickness, the dose in the exposure of the lacquer and the sacrificial layer surface it is not possible to produce holes with diameters of less than 5 μm in a clean and reliable manner. This leads to an intolerable restriction of the yield. A further disadvantage is that here the stability of the lid layer is reduced by many holes in the lid. In addition, when closing the so-formed holes for etching having a size of more than 1 μm, there is the danger that closing material, e.g. SU-8, enters the cavity via these holes for etching over the cavity.
EP 0 373 360 B1 describes a method for producing an improved insulation in VLSO and ULSI circuits, wherein here also a cavity is to be formed. Here the cavity is also structured by a sacrificial layer removed by one or more openings in a surface of the arrangement. Thus, here the same problems occur, as they have been previously described.